N3P

Designing chips for modern, leading-edge manufacturing technologies is an expensive endeavor. Still, dozens of companies have already adopted TSMCs N3 and N3E (3 nm-class) fabrication processes, according to disclosures made by TSMC and Synopsys. "Synopsys IP for TSMC's 3nm process has been adopted by dozens of leading companies to accelerate their development time, quickly achieve silicon success and speed their time to market," said John Koeter, senior vice president of marketing and strategy for IP at Synopsys. TSMC has been producing chips using its latest N3 (aka N3B) fabrication technology (with up to 25 EUV layers and support for EUV double patterning) since late 2022 and intends to start making products on its simplified N3E manufacturing process (with up to 19 EUV layers and without EUV...

TSMC Details 3nm Evolution: N3E On Schedule, N3P and N3X To Deliver 5% Performance Gains

Alongside some new announcements for their 2nm process node plans, TSMC has also released a progress and roadmap update for their N3 family process technologies at today's 2023 North...

13 by Anton Shilov on 4/26/2023

TSMC Readies Five 3nm Process Technologies, Adds FinFlex For Design Flexibility

Taiwan Semiconductor Manufacturing Co. on Thursday kicked off its 2022 TSMC Technology Symposium, where the company traditionally shares it process technology roadmaps as well as its future expansion plans...

44 by Anton Shilov on 6/16/2022

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