Amongst the new iPad and Watch devices released today, Apple made news in releasing the new A14 SoC chip. Apple’s newest generation silicon design is noteworthy in that is the industry’s first commercial chip to be manufactured on a 5nm process node, marking this the first of a new generation of designs that are expected to significantly push the envelope in the semiconductor space.

Apple’s event disclosures this year were a bit confusing as the company was comparing the new A14 metrics against the A12, given that’s what the previous generation iPad Air had been using until now – we’ll need to add some proper context behind the figures to extrapolate what this means.

On the CPU side of things, Apple is using new generation large performance cores as well as new small power efficient cores, but remains in a 2+4 configuration. Apple here claims a 40% performance boost on the part of the CPUs, although the company doesn’t specify exactly what this metric refers to – is it single-threaded performance? Is it multi-threaded performance? Is it for the large or the small cores?

What we do know though is that it’s in reference to the A12 chipset, and the A13 already had claimed a 20% boost over that generation. Simple arithmetic thus dictates that the A14 would be roughly 16% faster than the A13 if Apple’s performance metric measurements are consistent between generations.

On the GPU side, we also see a similar calculation as Apple claims a 30% performance boost compared to the A12 generation thanks to the new 4-core GPU in the A14. Normalising this against the A13 this would mean only an 8.3% performance boost which is actually quite meagre.

In other areas, Apple is boasting more significant performance jumps such as the new 16-core neural engine which now sports up to 11TOPs inferencing throughput, which is over double the 5TOPs of the A12 and 83% more than the estimated 6TOPs of the A13 neural engine.

Apple does advertise a new image signal processor amongst new features of the SoC, but otherwise the performance metrics (aside from the neural engine) seem rather conservative given the fact that the new chip is boasting 11.8 billion transistors, a 38% generational increase over the A13’s 8.5bn figures.

The one explanation and theory I have is that Apple might have finally pulled back on their excessive peak power draw at the maximum performance states of the CPUs and GPUs, and thus peak performance wouldn’t have seen such a large jump this generation, but favour more sustainable thermal figures.

Apple’s A12 and A13 chips were large performance upgrades both on the side of the CPU and GPU, however one criticism I had made of the company’s designs is that they both increased the power draw beyond what was usually sustainable in a mobile thermal envelope. This meant that while the designs had amazing peak performance figures, the chips were unable to sustain them for prolonged periods beyond 2-3 minutes. Keeping that in mind, the devices throttled to performance levels that were still ahead of the competition, leaving Apple in a leadership position in terms of efficiency.

What speaks against such a theory is that Apple made no mention at all of concrete power or power efficiency improvements this generation, which is rather very unusual given they’ve traditionally always made a remark on this aspect of the new A-series designs.

We’ll just have to wait and see if this is indicative of the actual products not having improved in this regard, of it’s just an omission and side-effect of the new more streamlined presentation style of the event.

Whatever the performance and efficiency figures are, what Apple can boast about is having the industry’s first ever 5nm silicon design. The new TSMC-fabricated A14 thus represents the cutting-edge of semiconductor technology today, and Apple made sure to mention this during the presentation.

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  • playtech1 - Wednesday, September 16, 2020 - link

    I wonder if that is the first A series chip tuned for MacOS - could it be that the short period of sustained peak performance was an issue on the Mac side so they focused on fixing that? Pure speculation, but if Apple is going to use its chips across multiple products it seems inevitable that compromises will need to be made.
  • Speedfriend - Wednesday, September 16, 2020 - link

    Surely they need something more powerful than this for the Mac, at 40% improvement over A12, we are talking 1550 SC, 3700 MC in Geekbench, when an i5 tiger lake looks to be 1400 SC, 5100MC and the i7 1600SC, 6100 MC. Apple has promised 30% better performance than Intel, haven't they?
  • surt - Wednesday, September 16, 2020 - link

    I'd be shocked if they didn't have a much larger chip planned for the mac. I'd expect at least double the area.
  • Zoolook - Wednesday, September 16, 2020 - link

    It would be strange if there aren't at least four big cores as a minimum yes.
  • TouchdownTom9 - Friday, September 18, 2020 - link

    Completely agree. I would expect 1.5 or 2x larger die size for the first macbook launched (maybe around 150mm if the iphone 12 chip is 100mm sq. I would expect around 200 or 250mm for a mac chip given they likely will do all they can to attack concerns of ARM processing power head on. Though I'll admit I am talking completely out of my depth on this
  • blackcrayon - Wednesday, September 16, 2020 - link

    We already know they make custom tailored chips though. A14X (Z?) might be a perfect fit for the first line of Apple Silicon Macs (ultra light notebooks with similar requirements to an iPad Pro). Who knows - but using the same architecture and ramping the CPU/GPU core #s way up might be what they have planned.
  • Showtime - Wednesday, September 16, 2020 - link

    WIN/WIN and not just for Apple. 8% with any efficiency gains while using their own chips is great for us consumers.
  • RedOnlyFan - Wednesday, September 16, 2020 - link

    Is tsmc 5nm a full node or a half node "just a renamed 7nm"
  • Archer_Legend - Thursday, September 17, 2020 - link

    Possibly both
  • tipoo - Monday, September 21, 2020 - link

    5nm is named as a mainline full node, 4nm is the half node, 3nm is the next full node

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