AMD Zen 4 Ryzen 9 7950X and Ryzen 5 7600X Review: Retaking The High-Endby Ryan Smith & Gavin Bonshor on September 26, 2022 9:00 AM EST
Socket AM5: The New Platform for Consumer AMD
While the star for most CPU launches is typically the titular CPU, there’s a good argument to be had that for the Ryzen 7000 desktop launch, AMD’s overall platform warrants just as much attention, if not a bit more. After all, the company’s up-to-now current AM4 platform was introduced back in 2016, alongside Bristol Ridge, the last of the Bulldozers. A lot has changed for AMD in the last 6 years – not the least being the movement to the Zen core family – and now their underlying platform is getting a major overhaul as well.
The first new consumer platform and associated socket designed by AMD since the start of the Zen era, AM5 is designed to bring three major updates to AMD’s desktop ecosystem. These can be roughly broken down as improving power delivery, adding DDR5 memory support, and boosting the amount of bandwidth and flexibility for I/O devices downstream of the CPU. All three of these things require (or at least are best accomplished) with CPU pin changes, so this is AMD’s first chance in 6 years to overhaul everything that flows in and out of their desktop CPUs.
Physically, the most obvious change is of course the socket itself. AMD held on to using pin grid array (PGA) sockets for its mainstream consumer platforms for over a decade after Intel made the switch to land grid array (LGA), but now with AM5 the company is making the switch as well.
As was the case when Intel switched, the shift to LGA brings a couple of benefits, and a couple of trade-offs. Overall LGA allows for greater pin density; whereas socket AM4 was 1331 pins, socket AM5 is 1718 pins in the same package size. This switch also means that the relatively vulnerable pins are moved from the CPU package to the motherboard, which is modestly safer overall. The good news is that this means the days of trying to fix pins on an AMD CPU with a mechanical pencil are coming to an end; the bad news is that if LGA pins are damaged, the motherboard is essentially done for.
This also means that AM5 gets the vastly improved retention mechanisms required by LGA setups, as opposed to the zero-insertion force (ZIF) sockets of the last 30+ years. So CPUs are now much more securely locked down into their sockets, and the errant cases where trying to pull off a cooler and having the CPU come with it is no longer a possibility.
It’s notable here that AMD’s new socket actually has slightly more pins than Intel’s current LGA-1700 socket, at 1718 vs. 1700. Though sharp-eyed power users will note that Intel and AMD have pretty distinct pin configurations (never mind package sizes), with Intel reserving a decent amount of the of the pin pad for placing capacitors and other electronics on the underside of the CPU package, whereas AMD has placed everything on top.
But despite the significant changes in CPU sockets, AMD has worked to preserve backwards compatibility with standard socket AM4 coolers. This is part of the reason for AM5 chips’ odd heatspreader layout, and while I have some personal misgivings about keeping the clips around, there’s no arguing that it will help get the AM5 ecosystem immediately bootstrapped, as it won’t require entirely new coolers. With that said, this compatibility does not extend to coolers that need to replace the stock AMD backplate, so the compatibility rate is not 100%. Builders looking to reuse an old cooler in a system upgrade will want to look into matters to make sure that their cooler is indeed compatible with AM5.
AM5 Power Delivery: Higher Limits & SVI3 Power Management
A big portion of AMD’s new pin budget for AM5 has, in turn, been invested into power delivery. The AM4 platform was designed for CPUs at TDPs up to 105W – or more specifically, a maximum socket power of 142W. As seasoned overclockers already know, this isn’t a hard limit and it’s long been possible to drive more power than this through AM4. But doing so does exceed the design parameters of the socket, the trade-offs of which aren’t advisable for commercial off-the-shelf systems that may need to be supported for several years.
So for AM5, AMD has significantly increased the maximum power they can drive through their socket. The official TDP limit is 170 Watts, which maps out to a total socket power of 230 Watts, a 62% increase in stock power limits. And AMD is going to be taking full advantage of these higher power limits right out of the gate, with the Ryzen 9 7950X and other high-end processors slated to ship with 170W TDPs. In fact this is where a significant chunk of the multi-threaded performance gains from the new Ryzen chips are coming from, as previously AMD’s highest core count CPUs were TDP-constrained when trying to light up all of those cores.
|Stock AMD Socket AM5 TDP Groups|
|65W TDP||105W TDP||170W TDP|
|Socket Power (PPT) Watts||88W||142W||230W|
|Peak Current (EDC) Amps||150A||170A||225S|
|Sustained Current (TDC) Amps||75A||110A||160A|
Do note that this also means that cooling requirements are going up. For their 2 CCD parts with 170W TDPs, the 7900X and 7950X, AMD is outright recommending a 240mm (or larger) AIO cooler for keeping those chips under control. AMD only suggests tower coolers for the 1 CCD parts, as these have the same 105W TDP as AMD's former top-end AM4 parts. With that said, this doesn't mean an air cooled setup isn't going to be viable with the higher TDP parts, but you will definitely need a good air cooler if you want to keep ahead on dissipating all of the heat a fully loaded 16C processor can produce.
And while AMD’s peak power consumption is going higher, AMD is also implementing additional technologies to better manage power consumption, and to keep their chips from fully ramping up unless they need to. The big change here is that AMD has ported a lot of their power savings technologies from the Ryzen 6000 Mobile family over to the AM5 platform (and Ryzen 7000 IOD), most notably Scalable Voltage Interface 3 (SVI3), which as in the case of the mobile parts, is designed to allow faster and more discrete control over the voltage required from the chip.
SVI3 is a high-speed, 2-way communications protocol between the CPU and the voltage regulators, allowing the CPU to not only better direct the increasingly large number of VRM phases on high-end motherboards, but to keep an eye on VRM health, monitoring things such as power delivery and VRM temperature. This allows an AM5 CPU to make better and more aggressive decisions about power management, as opposed to having to make more conservative assumptions about the state of the VRMs.
Of particular note here, these upgrades allow for a larger number of overall power states the CPU can be in, which in turn allows for more optimal use of the VRMs. For example, this allows automatic phase shedding to shut off some of the VRM phases feeding the CPU when they’re not needed, which boosts the overall power efficiency of the system (extra phases are great when you need a lot of power, but waste power themselves at low loads).
Altogether, AM5 supplies CPUs with 3 variable power rails, which is up from the 2 rails supplied by AM4. The CPU cores and graphics cores get a shared rail, and there’s a separate SoC rail to power most of the rest of the IOD. Finally, there’s a miscellaneous VDD rail that provides power to the GMI/Infinity Fabric interconnects, along with some other, smaller IPs. Separate from that, there are still fixed rails for things like the memory, 3.3v rail, etc.
Native BIOS Flashback Support
With AMD slated to support the AM5 platform through at least 2025, this time around the company is more actively planning around the future of the platform. In particular, AMD is taking a stab at motherboard forward compatibility, which was increasingly an issue for AM4 over its six-year reign.
The big breaker there was that, even when supported by the chipset, older boards required newer BIOSes to support newer generations of CPUs. Thus the only way to make an old board work with a newer CPU was to flash it with a newer BIOS, which in turn required a working CPU to begin with – a catch 22 situation that ultimately resulted in AMD developing a loaner kit program which rented out older AM4 CPUs that customers could use to flash their older boards if they didn’t already have a new CPU for it (e.g. they just bought it off the shelf).
Ultimately, the more elegant solution to the problem is to allow BIOS flashing without a working CPU (or BIOS), which does an end-run around the whole problem. That exists today in the form of USB BIOS Flashback features; however flashback has been a motherboard-level feature that’s normally only found on select high-end motherboards and has to be implemented by the motherboard vendor itself. So for the AM4 generation, it was not a universal (or even widely available) option.
For the AM5 platform, AMD is taking matters into their own hands to make USB BIOS Flashback a universal feature. Ryzen 7000 chips will be able to support USB BIOS Flashback mode across the board and regardless of the BIOS currently installed. As a result, users will always be able to flash an updated BIOS to their AM5 boards, regardless of the CPUs supported by or the operational status of the current motherboard.
The net impact is that when AMD releases future chips on the AM5 platform – say, a Zen 5 chip in 2024 – it will be possible to install a compatible BIOS without first having to use a Zen 4 chip. Though this does assume, of course, that Zen 5 chips will work in current X/B-600 series boards, which is likely but should not be taken as a given. Otherwise, this change also offers a moderate improvement to the reliability of the AM5 platform, by making it so that the BIOS on any board can be restored should it end up corrupted for whatever reason.
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Oxford Guy - Tuesday, September 27, 2022 - linkThis has been posted for years. Reply
BoredInPDX - Tuesday, September 27, 2022 - linkI’m confused. I they 720p tests you write:
“All gaming tests here were run using integrated graphics, with a variation of 720p resolutions and at minimum settings.”
Yet all the prior-gen AMD CPUs tested are lacking an IGP. Am I missing something? Reply
Ryan Smith - Friday, September 30, 2022 - linkYou are not missing anything; we did not run any iGPU tests. That's a bit of boilerplate text that did not get scrubbed from this article. Thanks for bringing it up! Reply
Gigaplex - Wednesday, September 28, 2022 - linkThere's some odd results here and the article commentary doesn't seem to touch on it. Why is the 7600X absolutely trounced in Geekbench 4.0 MT? The second slowest CPU (3600XT) more than doubles it. And yet the 7950X wins by a mile in that same test, so it shouldn't be architectural. And in some of the gaming tests, the 7600X wins, and in some it comes dead last. Reply
Dribble - Wednesday, September 28, 2022 - linkThe processors are particularly cache bound - i.e. it fits in cache it runs very fast, if it doesn't it falls off rapidly. That is often visible in games where it'll run amazingly in some (mostly older) games, but tend to fall off, particularly in the lows, in more complex (mostly newer) games. Reply
ricebunny - Wednesday, September 28, 2022 - linkThe SPEC multithreaded tests are N separate instantiations of the single thread tests. That’s a perfect scenario where there is no dependency or serialization in the workload and tells us very little how the CPUs would perform in a parallel workload application. There are SPEC tests specifically designed to test parallel performance, but I do not see them included in this report. Anandtech, can you comment on this? Reply
abufrejoval - Wednesday, September 28, 2022 - linkEmerging dGPUs not supporting PCIe 5.0 is just crippleware!
While I can easily see that 16 lanes of PCIe 5.0 won't do much for any game, I can very much see what I'd do with the 8 lanes left over when all dGPU bandwidth requirements can be met with just 8 lanes of PCIe 5.0.
Why can't they just be good PCIe citizens and negotiate to use 16 lanes of PCIe 4.0 on lesser or previous generation boards and optimize lane allocation on higher end PCIe 5.0 systems that can then use bifurcation to add say a 100Gbit NIC, plenty of Thunderbolt 4 or better yet, something CXL?
Actually I'd be really astonished if this wasn't even an artifical cap and that the Nvidia chips may actually be able to do PCIe 5.0.
It's just that they'd much rather have people use NVlink. Reply
TheinsanegamerN - Tuesday, October 4, 2022 - linkUm....dude, 4.0x16 and 5.0x8 have the same bandwidth, and no GPU today can saturate 4.0, not even close. The 300ti OCed manages to saturate.....2.0. 3.0 is a whopping 7% faster.
You got awhile man. Reply
abufrejoval - Wednesday, September 28, 2022 - linkIt should be interesting to see if AMD is opening the architecture for 3rd parties to exploit the actual potential of the Ryzen 7000 chips.
The current mainboard/slot era that dates back to the 1981 IBM-PC (or the Apple ][) really is coming to an end and perhaps few things highlight this as well as a 600 Watt GPU that has a 65 Watt mainboard hanging under it.
We may really need something more S100 or VME, for those old enough to understand that.
Thunderbolt cables handle 4 lanes of PCIe 3.0 today and AFAIK cables are used for much higher lane counts and PCIe revisions within high-end server chassis today, even if perhaps at shorter lengths and with connectors designed for somewhat less (especially less frequent) pluggability.
Their main advantage is vastly reduced issues with mainboard traces and much better use of 3D space to optimize air flow cooling.
Sure those cables aren't cheap, but perhaps the cross-over point for additional PCB layers has been passed. And optical interconnects are waiting in the wings: they will use cables, too.
You stick PCIe 5.0 x4 fixed length cables out from all sides of an AM5 socket and connect those either to high bandwidth devices (e.g. dGPU) or a switch (PCIe 5.0 variant of the current ASMedia), you get tons of flexibility and expandability in a box form factor, that may not resemble an age old PC very much, but deliver tons of performance and expandability in a deskside form factor.
You want to recycle all your nice PCIe 3.0 2TB NVMe drives? Just add a board that puts a PCIe 5.0 20 lane switch between (even PCIe 4.0 might do fine if it's 50% $$$).
And if your dGPU actually needs 8 lanes of PCIe 5.0 to deliver top performance, connect two of those x4 cables to undo a bit of bifurcation!
How those cable connected board would then mount in a chassis and be cooled across a large range of form factors and power ranges is up for lots of great engineers to solve, while dense servers may already provide lots of the design bricks.
Unfortunately all that would require AMD to open up the base initialization code and large parts of the BIOS, which I guess currently has the ASmedia chip(s) pretty much hardwired into it.
And AMD with all their "we don't do artificial market segmentation" publicity in the past, seem to have become far more receptive to its bottom line benefits recently, to allow a free transition from console to PC/workstation and servers of all sizes.
And it would take a high-volume vendor (or AMD itself), a client side Open Compute project or similar to push that form factor the the scale where it becomes economically viable.
It's high time for a PC 2.0 (which isn't a PS/2) to bridge into the CXL universe even on desktops and workstations. Reply
Oxford Guy - Wednesday, September 28, 2022 - link"The current mainboard/slot era that dates back to the 1981 IBM-PC (or the Apple ][)"
Absolutely nothing about the IBM PC was new. The Micral N introduced slots in a microcomputer and the S-100 bus, introduced by the Altair, became the first big standard. Reply