EUV

Production of chips using leading-edge process technologies requires more compute power than ever. To address requirements of 2nm nodes and beyond, NVIDIA is rolling out its cuLitho software library that uses the company's DGX H100 systems based on H100 GPUs and promises to increase performance available to mask shops within a reasonable amount of consumed power by 40 times. Modern process technologies push wafer fab equipment to its limits and often require finer resolution than is physically possible, which is where computational lithography comes into play. The primary purpose of computational lithography is to enhance the achievable resolution in photolithography processes without modifying the tools. To do so, CL employs algorithms that simulate the production process, incorporating crucial data from ASML's equipment and shuttle (test...

AMD Clarifies Comments on 7nm / 7nm+ for Future Products: EUV Not Specified

As part of AMD’s Financial Analyst Day 2020, the company gave the latest updates for its CPU and GPU roadmap. A lot of this we have seen before, with...

37 by Dr. Ian Cutress on 3/5/2020

TSMC & Broadcom Develop 1,700 mm2 CoWoS Interposer: 2X Larger Than Reticles

With transistor shrinks slowing and demand for HPC gear growing, as of late there has been an increased interest in chip solutions larger than the reticle size of a...

18 by Anton Shilov on 3/4/2020

Intel CFO: Our 10nm Will Be Less Profitable than 22nm [Morgan Stanley Transcription]

This week at Morgan Stanley’s Analyst Conference, Intel’s CFO, George Davis, sat down to discuss the future of where Intel’s profitability lies. No stranger to the odd comments relating...

92 by Dr. Ian Cutress on 3/4/2020

Samsung Starts Mass Production at V1: A Dedicated EUV Fab for 7nm, 6nm, 5nm, 4nm, 3nm Nodes

Samsung Foundry has started mass production of chips using its 6LPP and 7LPP manufacturing processes at its new V1 fab. The new facility employs one of the industry’s first...

30 by Anton Shilov on 2/20/2020

ASML Ramps Up EUV Scanners Production: 35 in 2020, Up to 50 in 2021

ASML shipped 26 extreme ultraviolet lithography (EUVL) step-and-scan systems to its customers last year, and the company plans to increase shipments to around 35 in 2020. And the ramp-up...

22 by Anton Shilov on 1/23/2020

TSMC Boosts CapEx by $1 Billion, Expects N5 Node to Be Major Success

TSMC is on track to begin high-volume production of chips using its 5 nm technology in the coming months, the company said in its conference call last week. While...

40 by Anton Shilov on 1/22/2020

Intel Hires Fab Veteran, Former GlobalFoundries CTO Dr. Gary Patton

Intel has hired Dr. Gary Patton, the former CTO at GlobalFoundries and an ex-head of IBM Microelectronics business. Dr Patton was leading Global Foundries leading edge processes before that...

21 by Anton Shilov on 12/11/2019

EUV Wafers Processed and TwinScan Machine Uptime: A Quick Look

One of the interesting elements that came out of some of our discussions at the IEDM conference this year revolve around the present deployment of EUV. Currently only one...

29 by Dr. Ian Cutress on 12/11/2019

TSMC: 5nm on Track for Q2 2020 HVM, Will Ramp Faster Than 7nm

TSMC’s 5 nm (N5) manufacturing technology is projected to provide significant benefits when it comes to performance, power, and area scaling, which is why the contract maker of semiconductors...

27 by Anton Shilov on 10/23/2019

EUV Demand is Up: EUV Device Manufacturer ASML Beats Sales Estimates

Between the smartphone revolution, cloud computing, and the Internet of Things, the demand for cutting-edge chips has never been higher. And if you have any doubts about that, then...

46 by Anton Shilov on 10/16/2019

Hot Chips 31 Keynote Day 2: Dr. Phillip Wong, VP Research at TSMC (1:45pm PT)

The keynote for the second day is from TSMC, with Dr. Phillip Wong taking the stage to talk about the latest developments in TSMC's research and portfolio. The talk...

12 by Dr. Ian Cutress on 8/20/2019

Samsung’s Aggressive EUV Plans: 6nm Production in H2, 5nm & 4nm On Track

Samsung Foundry formally started to produce chips using its 7LPP (7 nm low power plus) fabrication process last October and has not slowdown development of its manufacturing technologies since...

42 by Anton Shilov on 7/31/2019

TSMC: 3nm EUV Development Progress Going Well, Early Customers Engaged

Development of new fabrication technologies never stops at leading-edge companies such as TSMC. Therefore, it is not surprising to hear the annoucement that development of TSMC’s 3nm node is...

76 by Anton Shilov on 7/23/2019

Micron’s DRAM Update: More Capacity, Four More 10nm-Class Nodes, EUV, 64 GB DIMMs

During its earnings conference call with investors and financial analysts earlier this week, Micron expressed confidence in its long-term future and strong demand for its products as new applications...

23 by Anton Shilov on 6/28/2019

Intel Process Technology Update: 10nm Server Products in 1H 2020, Accelerated 7nm in 2021

Intel provided an update regarding its upcoming fabrication technologies at its 2019 Investor Meeting. The company is on track to produce server-class products using its 10 nm manufacturing technology...

74 by Anton Shilov on 5/8/2019

TSMC: No Plans to Buy Rivals at The Moment

Although TSMC expects demand for chips to increase going forward and despite an ongoing trend towards consolidation on the foundry market, the company has commented that it currently has...

4 by Anton Shilov on 4/22/2019

Samsung Completes Development of 5nm EUV Process Technology

Samsung Foundry this week announced that it has completed development of its first-generation 5 nm fabrication process (previously dubbed 5LPE). The manufacturing technology uses extreme ultraviolet lithography (EUVL) and...

21 by Anton Shilov on 4/17/2019

TSMC Reveals 6 nm Process Technology: 7 nm with Higher Transistor Density

TSMC this week unveiled its new 6 nm (CLN6FF, N6) manufacturing technology, which is set to deliver a considerably higher transistor density when compared to the company's 7 nm...

23 by Anton Shilov on 4/17/2019

TSMC’s 5nm EUV Making Progress: PDK, DRM, EDA Tools, 3rd Party IP Ready

TSMC this week has said that it has completed development of tools required for design of SoCs that are made using its 5 nm (CLN5FF, N5) fabrication technology. The...

33 by Anton Shilov on 4/5/2019

SMIC To Start 14nm Mass Production in H1 2019

Reports have emerged this week that SMIC, the largest foundry in China, is set to start mass production using its in-house developed 14 nm FinFET manufacturing technology in the...

20 by Anton Shilov on 2/8/2019

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