TSMC
TSMC is no stranger to building big chips. Besides the ~800mm2 reticle limit of their normal logic processes, the company already produces even larger chips by fitting multiple dies on to a single silicon interposer, using their chip-on-wafer-on-substrate (CoWoS) technology. But even with current-gen CoWoS allowing for interposers up to 3.3x TSMC's reticle limit, TSMC plans to build bigger still in response to projected demand from the HPC and AI industries. To that end, as part of the company's North American Technology Symposium last week, TSMC announced that they are developing the means of building super-sized interposers that can reach over 8x the reticle limit. TSMC's current-generation CoWoS technology allows for building interposers up to 2831 mm2 and the company is already seeing customers come...
AMD Q4: 16-core Ryzen 9 3950X, Threadripper Up To 32-Core 3970X, Coming November 25th
AMD is set to close out the year on a high note. As promised, the company will be delivering its latest 16-core Ryzen 9 3950X processor, built with two...
171 by Dr. Ian Cutress on 11/7/2019
GlobalFoundries and TSMC Sign Broad Cross-Licensing Agreement, Dismiss Lawsuits
GlobalFoundries and TSMC have announced this afternoon that they have signed a broad cross-licensing agreement, ending all of their ongoing legal disputes. Under the terms of the deal, the...
27 by Anton Shilov on 10/28/2019
TSMC: 5nm on Track for Q2 2020 HVM, Will Ramp Faster Than 7nm
TSMC’s 5 nm (N5) manufacturing technology is projected to provide significant benefits when it comes to performance, power, and area scaling, which is why the contract maker of semiconductors...
27 by Anton Shilov on 10/23/2019
TSMC Radically Boosts CapEx to Expand Production Capacities, To Reach $14B For 2019
Forecasting strong demand for its 5 nm and 7 nm class process technologies in the coming years, TSMC has announced that it's increasing its capital expenditure for 2019 by...
18 by Anton Shilov on 10/18/2019
Samsung & TSMC Develop 8nm & 7nm Automotive-Grade Nodes
As vehicles are getting ‘smarter’ and gaining autopilot capabilities, it is easy to predict that the demand for higher-performing and more complex automotive SoCs will be growing rapidly in...
29 by Anton Shilov on 10/14/2019
TSMC: N7+ EUV Process Technology in High Volume, 6nm (N6) Coming Soon
TSMC announced on Monday that its customers have started shipping products based on chips made by TSMC using its N7+ (2nd Generation 7 nm with EUV) process technology that...
27 by Anton Shilov on 10/8/2019
TSMC Counter-sues GlobalFoundries: Accuses US Fab of Infringing Patents Across Numerous Process Nodes
In a not-unexpected move, TSMC late on Monday filed a lawsuit against GlobalFoundries, its pure-play foundry rival, accusing the manufacturer of patent infringment. In the suit, a response to...
24 by Anton Shilov on 10/1/2019
Arm & TSMC Showcase 7nm Chiplet, Eight A72 at 4GHz on CoWoS Interposer
Arm and TSMC this week unveiled their jointly developed proof-of-concept chip that combines two quad-core Cortex-72-based 7 nm chiplets on TSMC’s Chip-on-Wafer-on-Substrate (CoWoS) interposer. The two chips are connected...
26 by Anton Shilov on 9/27/2019
TSMC Responds to Lawsuit by GlobalFoundries: Allegations Are Baseless
TSMC has responded to GlobalFoundries accusations of patents infringements. The world’s largest foundry said that it would defend itself in courts and that it considered allegations as baseless. The...
62 by Anton Shilov on 8/27/2019
GlobalFoundries Sues TSMC Over Patent Infringement; Apple, Qualcomm, Others Named Defendants
GlobalFoundries has filed a lawsuit against TSMC and its clients in the USA and Germany alleging the world’s largest contract maker of semiconductors of infringing 16 of its patents...
97 by Anton Shilov on 8/26/2019
Hot Chips 31 Keynote Day 2: Dr. Phillip Wong, VP Research at TSMC (1:45pm PT)
The keynote for the second day is from TSMC, with Dr. Phillip Wong taking the stage to talk about the latest developments in TSMC's research and portfolio. The talk...
12 by Dr. Ian Cutress on 8/20/2019
Hot Chips 31 Live Blogs: Intel Spring Crest NNP-T on 16nm TSMC
Intel is showing us some of the design features of its new ML training product, Spring Crest.
4 by Dr. Ian Cutress on 8/19/2019
TSMC Announces Performance-Enhanced 7nm & 5nm Process Technologies
TSMC has quietly introduced a performance-enhanced version of its 7 nm DUV (N7) and 5 nm EUV (N5) manufacturing process. The company’s N7P and N5P technologies are designed for...
36 by Anton Shilov on 7/30/2019
TSMC: 3nm EUV Development Progress Going Well, Early Customers Engaged
Development of new fabrication technologies never stops at leading-edge companies such as TSMC. Therefore, it is not surprising to hear the annoucement that development of TSMC’s 3nm node is...
76 by Anton Shilov on 7/23/2019
TSMC: Most 7nm Clients Will Transition to 6nm
In this week's quarterly earnings conference call, TSMC’s revealed that the company expects most of its 7nm "N7" process customers to eventually transition to its forthcoming 6nm "N6" manufacturing...
39 by Anton Shilov on 5/1/2019
TSMC: No Plans to Buy Rivals at The Moment
Although TSMC expects demand for chips to increase going forward and despite an ongoing trend towards consolidation on the foundry market, the company has commented that it currently has...
4 by Anton Shilov on 4/22/2019
TSMC Reveals 6 nm Process Technology: 7 nm with Higher Transistor Density
TSMC this week unveiled its new 6 nm (CLN6FF, N6) manufacturing technology, which is set to deliver a considerably higher transistor density when compared to the company's 7 nm...
23 by Anton Shilov on 4/17/2019
TSMC’s 5nm EUV Making Progress: PDK, DRM, EDA Tools, 3rd Party IP Ready
TSMC this week has said that it has completed development of tools required for design of SoCs that are made using its 5 nm (CLN5FF, N5) fabrication technology. The...
33 by Anton Shilov on 4/5/2019
TSMC’s Fab 14B Photoresist Material Incident: $550 Million in Lost Revenue
TSMC on Friday revealed more details regarding an incident with a photoresist material at its Fab 14B earlier this year. The contaminated chemical damaged wafers on TSMC’s 12 nm...
29 by Anton Shilov on 2/20/2019
TSMC Chip Yields Hit By Bad Chemical Batch
TSMC on Monday said that some of the wafers it has processed recently have lower yields because of a chemical it uses during production. The company began investigation and...
28 by Anton Shilov on 1/29/2019
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